In the manufacture of integrated circuits, photolithographic processes are commonly used, in which a wafer is patterned by projecting radiation through a patterned mask to form an image pattern on a photo sensitive material, referred to as a photoresist, or simply resist. The exposed resist material is developed to form openings corresponding to the image pattern, and then the pattern is transferred to the wafer substrate by methods such as etching, as known in the art.
Many methods have been developed to compensate for the image degradation that occurs when the resolution of optical lithography systems approaches the critical dimensions (CD's) of desired lithographic patterns that are used to form devices and integrated circuits (IC's) on a semiconductor chip. Critical dimension (CD) refers to the feature size and spacing between features and feature repeats (pitch) that are required by the design specifications and are critical for the proper functioning of the devices on a chip. When the CD's of a desired IC pattern approach the resolution of a lithographic system (defined as the smallest dimensions that can be reliably printed by the system), image distortions becomes a significant problem. Today the limited resolution of lithography tools poses a key technical challenge in IC manufacture, and this difficulty will increase in the future as critical dimensions become increasingly smaller. In order to make the manufacture of future IC products feasible, lithography tools will be required to achieve adequate image fidelity when the ratio of minimum CD to resolution of the lithographic system is very low.
The basic lithography system consists of a light source, a photomask containing the pattern to be transferred to the wafer, a collection of lenses, and a means for aligning existing patterns on the wafer with patterns on the mask. The mask design process as described herein covers the steps from chip design, model-based optical proximity correction (MBOPC), OPC Verification and mask fabrication.
The resolution ρ of a lithographic system can be described by the equation:
                              ρ          =                                    k              1                        ⁢                          λ              NA                                      ,                            Eq        .                                  ⁢        1            where ρ is the minimum feature size that can be lithographically printed, λ is the wavelength of the light source used in the projection system and NA (numerical aperture) is a measure of the amount of light that can be collected by the projection optics. k1 is a factor that represents aspects of the lithographic process other than wavelength or numerical aperture, such as resist properties or the use of enhanced masks. When the illumination source is partially coherent, k1 may expressed as 1/[2(σ+1)], where σ is a measure of the partial coherence of the source, where σ has a value between 0 and 1. Typical values for k1 range from about 0.7 to 0.3.
Low k1 patterning is typically extremely sensitive to fluctuations in lithographic parameters such as dose, mask CD, focus, etc., which leads to small process windows. Methods have been proposed for optimizing combinations of source illumination and mask patterns (referred to hereinafter as source-mask optimization or “SMO”) together can result in improved process windows (see, for example, U.S. Pat. No. 6,563,566). However, SMO methods are very computationally expensive and it is impractical to perform SMO on a full chip layout. Thus, only selected “hard-to-print” patterns from the full chip layout should be considered for full optimization by computationally intensive methods such as SMO.
Currently, so-called “hard-to-print” patterns are identified using a set of predetermined rules that are determined experimentally for a specific chip design. However, such rules are not applicable in general cases. Other methods rely on an approximate imaging methods that are too slow for many applications.
In view of the above, there is a need for a fast method to identify “hard-to-print” patterns that can be prioritized for processing with full optimization methods.